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(parent: 5cf1941) | patch
PCI: Support BAR sizes up to 8GB
authorAlan <alan@linux.intel.com>
Mon, 19 May 2014 13:03:14 +0000 (14:03 +0100)
committerBjorn Helgaas <bhelgaas@google.com>
Fri, 23 May 2014 16:47:21 +0000 (10:47 -0600)
commitcd9cd01a650041214c94822440780337bd52a90b
tree2ca7d75ce49993efafad9d6d744ef8a7b674c81ftree | snapshot
parent5cf19413f6ce5a8ea29e51a70a8ea1db6c6b22aacommit | diff
PCI: Support BAR sizes up to 8GB

This is needed for some of the Xeon Phi type systems.

[bhelgaas: added Nikhil, use ARRAY_SIZE() to connect with decl, folded in
Kevin's "order < 0" fix to ARRAY_SIZE() usage]
Signed-off-by: Nikhil P Rao <nikhil.rao@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/setup-bus.c diff | blob | history
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