]> git.baikalelectronics.ru Git - kernel.git/commit
arm64: dts: qcom: sc7280: Set SPI flash to 50 MHz for herobrine boards
authorDouglas Anderson <dianders@chromium.org>
Thu, 5 May 2022 23:14:30 +0000 (16:14 -0700)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Sun, 26 Jun 2022 02:43:03 +0000 (21:43 -0500)
commitcc4d67161bd1d49bf121a3b3e9d5176b8b5c8e9f
tree6c647628ca779e58fd52ef0ecd17f79954e73edc
parent311f81f0934c2865da762cbcd44eb491c826b123
arm64: dts: qcom: sc7280: Set SPI flash to 50 MHz for herobrine boards

sc7280-herobrine based boards are specced to be able to access their
SPI flash at 50 MHz with the drive strength of the pins set at 8. The
drive strength is already set to 8 in "sc7280-herobrine.dtsi", so
let's bump up the clock. The matching firmware change for this is at:

https://review.coreboot.org/c/coreboot/+/63948

NOTE: the firmware change isn't _required_ to make the kernel work at
50 MHz, it merely shows that the boards are known to work fine at 50
MHz.

ALSO NOTE: this doesn't update the "sc7280-chrome-common.dtsi" file
which is used by both herobrine boards and IDP. At the moment the IDP
boards aren't configuring a drive strength of 8 and it seems safer to
just leave them at the slower speed if they're already working.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505161425.1.Icf6f3796d2fa122b4c0566d9317b461bfbc24b7f@changeid
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi