]> git.baikalelectronics.ru Git - arm-tf.git/commit
Cortex-A35: Implement workaround for errata 855472
authorLouis Mayencourt <louis.mayencourt@arm.com>
Fri, 5 Apr 2019 15:25:25 +0000 (16:25 +0100)
committerLouis Mayencourt <louis.mayencourt@arm.com>
Wed, 17 Apr 2019 12:46:43 +0000 (13:46 +0100)
commitcba71b70ef7070bcd38a8d202f30e58f79e36c6b
tree599730f99e105a55b1733af839730a6cc204bc23
parent5d149bdb18c0c6fb0aa76f32e0ffbb9f9269c994
Cortex-A35: Implement workaround for errata 855472

Under specific conditions, the processor might issue an eviction and an
L2 cache clean operation to the interconnect in the wrong order. Set
the CPUACTLR.ENDCCASCI bit to 1 to avoid this.

Change-Id: Ide7393adeae04581fa70eb9173b742049fc3e050
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
docs/cpu-specific-build-macros.rst
include/lib/cpus/aarch64/cortex_a35.h
lib/cpus/aarch64/cortex_a35.S
lib/cpus/cpu-ops.mk