]> git.baikalelectronics.ru Git - uboot.git/commit
arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch
authorLey Foon Tan <ley.foon.tan@intel.com>
Fri, 18 May 2018 14:05:25 +0000 (22:05 +0800)
committerMarek Vasut <marex@denx.de>
Fri, 18 May 2018 08:30:48 +0000 (10:30 +0200)
commitcb99ea573ebc6ddbd5ca36c06002912d7ebd7917
tree0038d41b489c1f31ece1464f6dad29b0aeafa77c
parentfb57df02e9c231048a8df32eb747b66a505d0613
arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch

Preparation for Stratix 10 enablement. In ARM64, L2 cache controller is
accessed through processor registers. So, add CONFIG_SYS_L2_PL310 switch
conditional build in order this file can by shared across other SOCFPGAs.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
arch/arm/mach-socfpga/misc.c