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perf/x86: Hybrid PMU support for unconstrained
authorKan Liang <kan.liang@linux.intel.com>
Mon, 12 Apr 2021 14:30:47 +0000 (07:30 -0700)
committerPeter Zijlstra <peterz@infradead.org>
Mon, 19 Apr 2021 18:03:25 +0000 (20:03 +0200)
commitc920c95ab379c27dc72757e269c75af5694b4184
tree890f794eae350a899f516bf22603069b70c4dff8tree | snapshot
parent697991ae6ea1c890d973559bbe7cabdf8e54cdcfcommit | diff
perf/x86: Hybrid PMU support for unconstrained

The unconstrained value depends on the number of GP and fixed counters.
Each hybrid PMU should use its own unconstrained.

Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1618237865-33448-8-git-send-email-kan.liang@linux.intel.com
arch/x86/events/intel/core.c diff | blob | history
arch/x86/events/perf_event.h diff | blob | history
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