]> git.baikalelectronics.ru Git - kernel.git/commit
net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver
authorSalil <salil.mehta@huawei.com>
Wed, 2 Aug 2017 15:59:49 +0000 (16:59 +0100)
committerDavid S. Miller <davem@davemloft.net>
Thu, 3 Aug 2017 22:08:17 +0000 (15:08 -0700)
commitc701070a20f5552efbc4371c807497b15e1759eb
tree4413b1ce8170feb2a7d0569c6cafee7b68af7b41
parent22c0e2ce21dd1dda6032db041e855c3494e2d062
net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver

THis patch adds the support of the Scheduling and Shaping
functionalities during the transmit leg. This also adds the
support of Pause at MAC level. (Pause at per-priority level
shall be added later along with the DCB feature).

Hardware as such consists of two types of cofiguration of 6 level
schedulers. Algorithms varies according to the level and type
of scheduler being used. Current patch is used to initialize
the mapping, algorithms(like SP, DWRR etc) and shaper(CIR, PIR etc)
being used.

Signed-off-by: Daode Huang <huangdaode@hisilicon.com>
Signed-off-by: lipeng <lipeng321@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c [new file with mode: 0644]
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h [new file with mode: 0644]