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(parent: cae2877) | patch
ARM: uniphier: enable SSC for more PLLs for LD20 SoC
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Thu, 27 Oct 2016 14:47:00 +0000 (23:47 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Sat, 29 Oct 2016 08:01:40 +0000 (17:01 +0900)
commitc630101b7a89b9ddd777d22b60059d8b995648c3
tree9b7619454884be032f9147f883d69d74d4631393tree | snapshot
parentcae2877d1e4f7a4b700814885620778ee646f14bcommit | diff
ARM: uniphier: enable SSC for more PLLs for LD20 SoC

For Electro-Magnetic Compatibility.

Set CPLL, SPLL2, MPLL, VPPLL, GPPLL, DPLL* to SSC rate 1 percent.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/mach-uniphier/clk/dpll-ld20.c diff | blob | history
arch/arm/mach-uniphier/clk/pll-ld20.c diff | blob | history
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