]> git.baikalelectronics.ru Git - kernel.git/commit
clk: renesas: rzg2l: Fix off-by-one check in rzg2l_cpg_clk_src_twocell_get()
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Thu, 17 Jun 2021 15:54:32 +0000 (16:54 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 19 Jul 2021 08:53:52 +0000 (10:53 +0200)
commitc57728f647c33e9773f33058edd806d053d3016f
treec6b406f6895ce97a3af8cae85ef9c63071188402
parentdbe43d41de74b3c903e977e0f98550628791739f
clk: renesas: rzg2l: Fix off-by-one check in rzg2l_cpg_clk_src_twocell_get()

Fix clock index out of range check for module clocks in
rzg2l_cpg_clk_src_twocell_get().

Fixes: 46b7416df33c ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210617155432.18827-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/renesas-rzg2l-cpg.c