]> git.baikalelectronics.ru Git - kernel.git/commit
riscv: Add support to determine no. of L2 cache way enabled
authorYash Shah <yash.shah@sifive.com>
Thu, 20 Feb 2020 05:15:19 +0000 (10:45 +0530)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Wed, 20 May 2020 22:05:10 +0000 (15:05 -0700)
commitc4a4af5fcbb52552b38046b4f81a20011cc6faba
treee69c611a64e0c6652aa0744119b2efd84e1baeb0
parent8d834b36bc49ff28ad2e13f90ad5e08c85b56227
riscv: Add support to determine no. of L2 cache way enabled

In order to determine the number of L2 cache ways enabled at runtime,
implement a private attribute ("number_of_ways_enabled"). Reading this
attribute returns the number of enabled L2 cache ways at runtime.

Using riscv_set_cacheinfo_ops() hook a custom function, that returns
this private attribute, to the generic ops structure which is used by
cache_get_priv_group() in cacheinfo framework.

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
drivers/soc/sifive/sifive_l2_cache.c