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board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init()
authorYu Chien Peter Lin <peterlin@andestech.com>
Mon, 6 Feb 2023 08:10:45 +0000 (16:10 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Fri, 17 Feb 2023 11:07:48 +0000 (19:07 +0800)
commitbf2ec5f7b3b45eba54ac3262491c13c3d7282f65
treed3529bd4e1480223a2db1c97bc0326641878f77etree | snapshot
parent303ea872dbe65007108c42ded25325e596c03bc7commit | diff
board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init()

The L2-cache is not enabled currently, the enbale_caches() will call
the v5l2_enable() callback to enable it in SPL.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
board/AndesTech/ax25-ae350/ax25-ae350.c diff | blob | history
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