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(parent: 5f76ecf) | patch
sunxi: clk: add MMC gates/resets
authorAndre Przywara <andre.przywara@arm.com>
Tue, 29 Jan 2019 15:54:09 +0000 (15:54 +0000)
committerJagan Teki <jagan@amarulasolutions.com>
Tue, 29 Jan 2019 18:00:11 +0000 (23:30 +0530)
commitbe3a67dd77ab1dae02022cbade341817ea9d5c40
tree8f38de7357c03681bc0309bd76ab52fe00e02e06tree | snapshot
parent5f76ecf5bc9dcaa4ebf8d051e26b765d75ffd760commit | diff
sunxi: clk: add MMC gates/resets

Add the MMC clock gates and reset bits for all the Allwinner SoCs.
This allows them to be used by the MMC driver.

We don't advertise the mod clock yet, as this is still handled by the
MMC driver.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: add V3S, A80 gates/resets]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
drivers/clk/sunxi/clk_a10.c diff | blob | history
drivers/clk/sunxi/clk_a10s.c diff | blob | history
drivers/clk/sunxi/clk_a23.c diff | blob | history
drivers/clk/sunxi/clk_a31.c diff | blob | history
drivers/clk/sunxi/clk_a64.c diff | blob | history
drivers/clk/sunxi/clk_a80.c diff | blob | history
drivers/clk/sunxi/clk_a83t.c diff | blob | history
drivers/clk/sunxi/clk_h3.c diff | blob | history
drivers/clk/sunxi/clk_h6.c diff | blob | history
drivers/clk/sunxi/clk_r40.c diff | blob | history
drivers/clk/sunxi/clk_v3s.c diff | blob | history
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