]> git.baikalelectronics.ru Git - kernel.git/commit
arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
authorRobert Marko <robert.marko@sartura.hr>
Wed, 17 Nov 2021 14:02:22 +0000 (15:02 +0100)
committerMaxime Ripard <maxime@cerno.tech>
Wed, 17 Nov 2021 15:40:50 +0000 (16:40 +0100)
commitbd018ebd5c427039953660eea1869eecab9f9fc4
treefbe42020d311ff51092021fe00e6824f3d8445c6
parentbad68f6c0c96b209be688acd1511fc590315093b
arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode

Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its
currently set to plain RGMII mode meaning that it doesn't introduce
delays.

With this setup, TX packets are completely lost and changing the mode to
RGMII-ID so the PHY will add delays internally fixes the issue.

Fixes: 0177a5cfd988 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus")
Acked-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Ron Goossens <rgoossens@gmail.com>
Tested-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211117140222.43692-1-robert.marko@sartura.hr
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts