]> git.baikalelectronics.ru Git - kernel.git/commit
drm/tegra: dc: rgb: Allow changing PLLD rate on Tegra30+
authorDmitry Osipenko <digetx@gmail.com>
Wed, 29 Sep 2021 22:28:05 +0000 (01:28 +0300)
committerThierry Reding <treding@nvidia.com>
Thu, 16 Dec 2021 13:07:07 +0000 (14:07 +0100)
commitbc2139906cdcb999bdd1a6c8a23bd396e20bee11
tree503f22db3d777e19cdf04663606a6e66ded1f103
parentfe636a8341517243e84b9c23a2a595664fa0dd71
drm/tegra: dc: rgb: Allow changing PLLD rate on Tegra30+

Asus Transformer TF700T is a Tegra30 tablet device which uses RGB->DSI
bridge that requires a precise clock rate in order to operate properly.
Tegra30 has a dedicated PLL for each display controller, hence the PLL
rate can be changed freely. Allow PLL rate changes on Tegra30+ for RGB
output. Configure the clock rate before display controller is enabled
since DC itself may be running off this PLL and it's not okay to change
the rate of the active PLL that doesn't support dynamic frequency
switching since hardware will hang.

Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/drm/tegra/dc.c
drivers/gpu/drm/tegra/dc.h
drivers/gpu/drm/tegra/rgb.c