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(parent: 5d1358e) | patch
iio: frequency: adf4371: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:56:47 +0000 (18:56 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:17 +0000 (11:53 +0100)
commitbc095707d483e2f4b9058efa369b760bad3db281
tree465622e166c0d1c8b6c4a77ff94ed63d2831dcc3tree | snapshot
parent5d1358e23cd184d463c47f9929b13c248af54d78commit | diff
iio: frequency: adf4371: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: f1cf09b96c7f ("iio: frequency: adf4371: Add support for ADF4371 PLL")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-68-jic23@kernel.org
drivers/iio/frequency/adf4371.c diff | blob | history
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