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(parent: ea056d1) | patch
drm/amdgpu: change the alignment size of TMR BO to 1M
authorYang Wang <KevinYang.Wang@amd.com>
Fri, 9 Sep 2022 03:06:50 +0000 (11:06 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 13 Sep 2022 18:26:59 +0000 (14:26 -0400)
commitbb9367a2f094b3b0b7ee67dbed48f9a5beb299d1
tree6a9dd6226726f0aba94946e7c6c6375c6ccae00atree | snapshot
parentea056d11c2f96320dc889e5d3f6db4e3aeb6d047commit | diff
drm/amdgpu: change the alignment size of TMR BO to 1M

align TMR BO size TO tmr size is not necessary,
modify the size to 1M to avoid re-create BO fail
when serious VRAM fragmentation.

v2:
add new macro PSP_TMR_ALIGNMENT for TMR BO alignment size

Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c diff | blob | history
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h diff | blob | history
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