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(parent: 9bb9f62) | patch
mtd: spi-nor-core: Add support for volatile QE bit
authorTakahiro Kuwano <Takahiro.Kuwano@infineon.com>
Tue, 29 Jun 2021 06:00:59 +0000 (15:00 +0900)
committerJagan Teki <jagan@amarulasolutions.com>
Tue, 29 Jun 2021 13:46:54 +0000 (19:16 +0530)
commitbb5a49ad17e215c0fe522807e08d6962b80c5179
tree537eb3eb31207ffe61a8f3d74cc1e21088b0ea8btree | snapshot
parent9bb9f62b14e79314999c1109ff0d8e5b2c2db145commit | diff
mtd: spi-nor-core: Add support for volatile QE bit

Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad Enable bit in CFR1
volatile.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
drivers/mtd/spi/spi-nor-core.c diff | blob | history
include/linux/mtd/spi-nor.h diff | blob | history
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