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| author | Qingqing Zhuo <qingqing.zhuo@amd.com> | |
| Thu, 27 Jan 2022 02:52:11 +0000 (21:52 -0500) | ||
| committer | Alex Deucher <alexander.deucher@amd.com> | |
| Fri, 18 Feb 2022 19:07:00 +0000 (14:07 -0500) | ||
| commit | bb429e63bd296dd341e36b0a7ef9830c192fa89c | |
| tree | 4fe7d279c7b95c8dfda54a5dcba8cd70ac34608c | tree | snapshot |
| parent | 8b039bd96d5f20124a5532eb4344d2161cdbf47f | commit | diff |
| drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h | [new file with mode: 0644] | blob |
| drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h | [new file with mode: 0644] | blob |
| drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_2_offset.h | [new file with mode: 0644] | blob |
| drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_2_sh_mask.h | [new file with mode: 0644] | blob |