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plat: xilinx: versal: Add support to get clock rate value
authorTejas Patel <tejas.patel@xilinx.com>
Tue, 1 Sep 2020 11:43:53 +0000 (04:43 -0700)
committerManish Pandey <manish.pandey2@arm.com>
Mon, 7 Dec 2020 11:10:13 +0000 (11:10 +0000)
commitb6d7b3e9d616c255ad9ebaea7e029b383a2c9add
tree92e406d36aaae1084dc19636198d2edcd192c664tree | snapshot
parent07d8a5f7dc0aed07382cd7d3a276988b2e02b76dcommit | diff
plat: xilinx: versal: Add support to get clock rate value

Add support to get clock's rate value.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I3ed881053ef323b2ca73e13edd0affda860d381d
plat/xilinx/versal/pm_service/pm_api_sys.c diff | blob | history
plat/xilinx/versal/pm_service/pm_api_sys.h diff | blob | history
plat/xilinx/versal/pm_service/pm_svc_main.c diff | blob | history
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