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feat(plat/tc): enable MPAM functionality of L3 DSU cache
authorDavidson K <davidson.kumaresan@arm.com>
Fri, 13 Jan 2023 08:32:13 +0000 (14:02 +0530)
committerdavidson kumaresan <davidson.kumaresan@arm.com>
Fri, 27 Jan 2023 07:01:02 +0000 (08:01 +0100)
commitb45ec8cea483a38e358146b99205504ff7f98001
tree28f1d38a17ec2fc3c8e4f1f8f693f476f2589368tree | snapshot
parent1678bbb57249b6edd4cdebc3cbc33b04df8fa098commit | diff
feat(plat/tc): enable MPAM functionality of L3 DSU cache

The L3 cache in the DSU supports the Memory System Resources
Partitioning and Monitoring (MPAM). The MPAM specific registers in the
DSU are accessed through utility bus of DSU that are memory mapped from
0x1_0000_1000.

Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
Change-Id: I2798181d599228e96dd4c0043a2ccd94668c7e20
fdts/tc.dts diff | blob | history
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