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net: zynq: Don't overwrite gem_rclk_ctrl with default value
authorStefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Tue, 17 Jan 2017 15:27:24 +0000 (16:27 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 17 Feb 2017 09:22:46 +0000 (10:22 +0100)
commitb444c83e834bc308423c53af4419332326c472cf
tree56186173d41941656bd4e0339e166cb5d72efc65tree | snapshot
parent6c81f4aa6ec94671a52f5e178527cf729e0dd092commit | diff
net: zynq: Don't overwrite gem_rclk_ctrl with default value

The gem[0-1]_rclk_ctrl registers control the source of the rx clock,
control and data signals and configure via ps7_init function. Don't
overwrite the register with the default value.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/mach-zynq/slcr.c diff | blob | history
drivers/net/zynq_gem.c diff | blob | history
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