]> git.baikalelectronics.ru Git - kernel.git/commit
PCI: mobiveil: Use the 1st inbound window for MEM inbound transactions
authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Fri, 5 Jul 2019 09:56:34 +0000 (17:56 +0800)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Mon, 8 Jul 2019 10:23:13 +0000 (11:23 +0100)
commitb1ceda3f6881afa5f77d749a529a03387613f8f8
tree8e649c8ab418c15e5b6cc0db5e9b26a8f052ffe3
parentdd8a61205b34c89d7b8bdc4b132918eb8e35087d
PCI: mobiveil: Use the 1st inbound window for MEM inbound transactions

The inbound and outbound windows have completely separate control
registers sets in the host controller MMIO space. Windows control
register are accessed through an MMIO base address and an offset
that depends on the window index.

Since inbound and outbound windows control registers are completely
separate there is no real need to use different window indexes in the
inbound/outbound windows initialization routines to prevent clashing.

To fix this inconsistency, change the MEM inbound window index to 0,
mirroring the outbound window set-up.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[lorenzo.pieralisi@arm.com: update commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
drivers/pci/controller/pcie-mobiveil.c