]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 25 Apr 2019 16:29:05 +0000 (19:29 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 9 May 2019 13:01:22 +0000 (16:01 +0300)
commitb0effe64b5180bd8fd265226f52c77531fb917b2
treeb5d2b7b4ff59fd569566833fecb7dfedbafffcad
parent80741c5bac6e30adcab4575023deb873b13c4432
drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

On HSW the pipe A panel fitter lives inside the display power well,
and the input MUX for the EDP transcoder needs to be configured
appropriately to route the data through the power well as needed.
Changing the MUX setting is not allowed while the pipe is active,
so we need to force a full modeset whenever we need to change it.

Currently we may end up doing a fastset which won't change the
MUX settings, but it will drop the power well reference, and that
kills the pipe.

Cc: stable@vger.kernel.org
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Fixes: e870a06e50ac ("drm/i915: Enable fastset for non-boot modesets.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190425162906.5242-1-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_pipe_crc.c