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(parent: bc0f613) | patch
clk: qcom: gcc: Add PCIe0 and PCIe1 GDSC for SM8150
authorBhupesh Sharma <bhupesh.sharma@linaro.org>
Wed, 2 Mar 2022 20:30:41 +0000 (02:00 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 9 Mar 2022 14:53:29 +0000 (08:53 -0600)
commitadbda7369955995725305695e84718c65df7be70
treea834d89c6919cc7e912ef68a4afc505ef6f0d35ctree | snapshot
parentbc0f61339256b06d11e835483536958fc7ec5570commit | diff
clk: qcom: gcc: Add PCIe0 and PCIe1 GDSC for SM8150

Add the PCIe0 and PCIe1 GDSC defines & driver structures for SM8150.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302203045.184500-4-bhupesh.sharma@linaro.org
drivers/clk/qcom/gcc-sm8150.c diff | blob | history
include/dt-bindings/clock/qcom,gcc-sm8150.h diff | blob | history
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