]> git.baikalelectronics.ru Git - kernel.git/commit
Merge tag 'renesas-r9a07g044-dt-binding-defs-tag2' into renesas-clk-for-v5.15
authorGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 26 Jul 2021 12:14:50 +0000 (14:14 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 26 Jul 2021 12:14:50 +0000 (14:14 +0200)
commitad470779dee80a2f398503a4be2e17a56b22c778
tree44eeca6e9eb04ccbbf931de0bb4d3c075349577e
parentbbc7441fb2b667ce1da88a181dc17d23f50137dd
parent56f1f8b5ebf461fa54f6597ebbdf4d800d5327e4
Merge tag 'renesas-r9a07g044-dt-binding-defs-tag2' into renesas-clk-for-v5.15

Renesas RZ/G2L DT Binding Definitions Update

Missing definition for the P0_DIV2 core clock on the Renesas RZ/G2L
(R9A07G044) SoC, shared by driver and DT source files.