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(parent: 207bda9) | patch
fix(zynqmp): ensure memory write finish with dsb()
authorTanmay Shah <tanmay.shah@amd.com>
Tue, 13 Sep 2022 18:10:08 +0000 (11:10 -0700)
committerTanmay Shah <tanmay.shah@amd.com>
Tue, 13 Sep 2022 18:19:01 +0000 (11:19 -0700)
commitac6c135c83fe4efa4d6e9b9c06e899b57ce5647a
tree9d27bc7c674ed4453541136c30168a6131f526f2tree | snapshot
parent207bda950d9cc741a9fa3767219ccc83d8dd2736commit | diff
fix(zynqmp): ensure memory write finish with dsb()

GICD reg write must complete before core goes to idle
mode. Achieve this with dsb() barrier instruction in IPI
ISR

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Change-Id: I5af42ca901567ee5e54a5434ebe3e673a92cb9be
plat/xilinx/zynqmp/pm_service/pm_svc_main.c diff | blob | history
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