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(parent: 657791f) | patch
clk: si5351: Add DT property to enable PLL reset
authorSergej Sawazki <sergej@taudac.com>
Sat, 16 Sep 2017 11:44:41 +0000 (13:44 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 22 Dec 2017 02:09:18 +0000 (18:09 -0800)
commita9bbeb68777513044e9cb4d11a61c678dc5b394a
tree8406d6a2eb541671c99e636161023430a01054dftree | snapshot
parent657791ff431d6da2d647900193e9cc447aaeebcfcommit | diff
clk: si5351: Add DT property to enable PLL reset

Add optional output clock DT property to enable PLL reset when a clock
output is enabled.

Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Sergej Sawazki <sergej@taudac.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Documentation/devicetree/bindings/clock/silabs,si5351.txt diff | blob | history
drivers/clk/clk-si5351.c diff | blob | history
include/linux/platform_data/si5351.h diff | blob | history
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