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KVM: arm/arm64: vgic: Handle GICR_PENDBASER.PTZ filed as RAZ
authorZenghui Yu <yuzenghui@huawei.com>
Fri, 20 Dec 2019 11:18:33 +0000 (19:18 +0800)
committerMarc Zyngier <maz@kernel.org>
Sun, 19 Jan 2020 16:05:11 +0000 (16:05 +0000)
commita8e03506f60a71df3a58be6906cbaae73aa0dd89
treebd6c1d75d34d9b1ba5abda3deaa4f40e90f6b36ctree | snapshot
parent08e9a7e1e3b791ed911e3bfa3b584fe4d08f6419commit | diff
KVM: arm/arm64: vgic: Handle GICR_PENDBASER.PTZ filed as RAZ

Although guest will hardly read and use the PTZ (Pending Table Zero)
bit in GICR_PENDBASER, let us emulate the architecture strictly.
As per IHI 0069E 9.11.30, PTZ field is WO, and reads as 0.

Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Link: https://lore.kernel.org/r/20191220111833.1422-1-yuzenghui@huawei.com
virt/kvm/arm/vgic/vgic-mmio-v3.c diff | blob | history
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