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imx: imx8ulp: Set XRDC MRC4/5 for access DDR from APD
authorYe Li <ye.li@nxp.com>
Tue, 31 Jan 2023 08:42:15 +0000 (16:42 +0800)
committerStefano Babic <sbabic@denx.de>
Wed, 29 Mar 2023 18:15:42 +0000 (20:15 +0200)
commita7dcd0b551bd865c7a453c911e7fee07c7688763
treec801f64fa1cbd63aff0d9979622bc9a922a3ea59tree | snapshot
parentd10dbc9f1806323ffd0ad3cc4a2fd01024a32b7dcommit | diff
imx: imx8ulp: Set XRDC MRC4/5 for access DDR from APD

iMX8ULP A1 S400 ROM removes the setting for MRC4/5. So we have to set
them in SPL to allow access to DDR from A35 and APD PER masters

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
arch/arm/mach-imx/imx8ulp/rdc.c diff | blob | history
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