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(parent: abb3ffa) | patch
MMC: CSD and CID timeout values
authorMatthew Fleming <matthew.fleming@imgtec.com>
Thu, 2 Oct 2008 11:24:05 +0000 (12:24 +0100)
committerPierre Ossman <drzeus@drzeus.cx>
Sun, 12 Oct 2008 09:04:37 +0000 (11:04 +0200)
commita70768b31d8c525bb7d92885422b5bf4a2f764dd
treeea939e4e6b8a5b24b294932974fbe42ca7d427betree | snapshot
parentabb3ffa49bab2fd62ba334f89b0dae1421fda0d1commit | diff
MMC: CSD and CID timeout values

The MMC spec states that the timeout for accessing the CSD and CID
registers is 64 clock cycles.

Signed-off-by: Matthew Fleming <matthew.fleming@imgtec.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
drivers/mmc/core/mmc_ops.c diff | blob | history
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