drm/amd/display: have two different sr and pstate latency tables for renoir

drm/amd/display: have two different sr and pstate latency tables for renoir

[Why]
new sr and pstate latencies are optimized for the case when we are not
using lpddr4 memory

[How]
have two different wm tables, one for the lpddr case and one for
non lpddr case

Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>