]> git.baikalelectronics.ru Git - kernel.git/commit
clk: samsung: exynos4: Enable VPLL and EPLL clocks for suspend/resume cycle
authorMarek Szyprowski <m.szyprowski@samsung.com>
Tue, 19 Sep 2017 10:01:08 +0000 (12:01 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 4 Oct 2017 16:19:13 +0000 (09:19 -0700)
commita36b53728bdb3cd592a29ba3347e4c1337584264
treee2f6321a97526da05523ba608f9e0ea606210f0e
parenta5dc1039e9f14224d835c8bedb3d75a976ec4ee0
clk: samsung: exynos4: Enable VPLL and EPLL clocks for suspend/resume cycle

Commit f22416d99430 ("clk: samsung: Add enable/disable operation for
PLL36XX clocks") added enable/disable operations to PLL clocks. Prior that
VPLL and EPPL clocks were always enabled because the enable bit was never
touched. Those clocks have to be enabled during suspend/resume cycle,
because otherwise board fails to enter sleep mode. This patch enables them
unconditionally before entering system suspend state. System restore
function will set them to the previous state saved in the register cache
done before that unconditional enable.

Fixes: f22416d99430 ("clk: samsung: Add enable/disable operation for PLL36XX clocks")
CC: stable@vger.kernel.org # v4.13
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/samsung/clk-exynos4.c