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(parent: 90a58b9) | patch
drm/i915: Fix and cleanup DPLL calculation for Ironlake
authorZhenyu Wang <zhenyuw@linux.intel.com>
Mon, 2 Nov 2009 07:52:29 +0000 (07:52 +0000)
committerEric Anholt <eric@anholt.net>
Thu, 5 Nov 2009 22:00:32 +0000 (14:00 -0800)
commita1c856fdd77bcf6b5a2961eb65c48653a8b48e77
treea148753cbfea2eee98989d253b9ca572a7873023tree | snapshot
parent90a58b903c55bc55534530e7209505c41130770acommit | diff
drm/i915: Fix and cleanup DPLL calculation for Ironlake

When the ideal error range can't be reached, this will safely use
a most closed one. Clean up some dumb codes in DPLL function too.

This fixes DPLL clock issue against one monitor at 1680x1050@60hz.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/intel_display.c diff | blob | history
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