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clk: renesas: r8a7796: Add FDP clock
authorABE Hiroshige <hiroshige.abe.zc@renesas.com>
Thu, 14 Dec 2017 13:50:55 +0000 (22:50 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 5 Jan 2018 10:14:38 +0000 (11:14 +0100)
commita115f6362cee01813c66e10e397b25f2a06aecfb
tree45a53ba7c8c15393cd1d2e9e2a93251f8e7f248etree | snapshot
parent7aff266552d6042b43d3d5a9b13f0009ef862033commit | diff
clk: renesas: r8a7796: Add FDP clock

This patch adds FDP1-0 clock to the R8A7796 SoC.

Signed-off-by: ABE Hiroshige <hiroshige.abe.zc@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: s/fdp0/fdp1-0/]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
drivers/clk/renesas/r8a7796-cpg-mssr.c diff | blob | history
Linux Kernel Source Tree.