]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Update TRANS_MSA_MISC for fastsets
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 26 Mar 2019 14:25:55 +0000 (16:25 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 27 Mar 2019 13:30:57 +0000 (15:30 +0200)
commit9ef5d1476126e5e1d8642ac415b5d468f93dbe6e
tree7bea0d90e44d46590e60278529b6a8448d44d619
parentfea48035e7ebe835fbc4a94accfc70dd287fdec3
drm/i915: Update TRANS_MSA_MISC for fastsets

Update the DP MSA MISC bits for fastsets. This is needed
when we change between limited and full range RGB output.

On HSW+ changing limited_range does not currently result in a
full modeset since we have don't have the readout code for it
(for DP we could, and probably should, readout from TRANS_MSA_MISC
itself, for HDMI we would have to rely on the infoframe). So
the PIPE_CONF_CHECK() is only performed for pre-HSW platforms.
That means any change in the value will result in a fastset
instead. Fortunately there is no prohibition to changing
TRANS_MSA_MISC dynamically, so it looks like we can legally do
fastsets for this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190326142556.21176-5-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/intel_ddi.c