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(parent: dd44bdd) | patch
clk: qoriq: modify MAX_PLL_DIV to 32
authorZhao Qiang <qiang.zhao@nxp.com>
Wed, 16 Sep 2020 03:03:10 +0000 (11:03 +0800)
committerStephen Boyd <sboyd@kernel.org>
Wed, 14 Oct 2020 02:48:09 +0000 (19:48 -0700)
commit9d7e8077c88f688b984d7c8252aa74e1d9b14180
treecb0aab171fea024a8154e36cca142caa91bb6721tree | snapshot
parentdd44bddf04c5fd83529b139fbfac0a5372c1a87dcommit | diff
clk: qoriq: modify MAX_PLL_DIV to 32

On LS2088A, Watchdog need clk divided by 32,
so modify MAX_PLL_DIV to 32

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Link: https://lore.kernel.org/r/20200916030311.17280-1-qiang.zhao@nxp.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-qoriq.c diff | blob | history
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