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(parent: 3b4be2e) | patch
clk: qcom: lcc-msm8960: Fix PLL rate detection
authorStephen Boyd <sboyd@codeaurora.org>
Thu, 29 Jan 2015 23:38:12 +0000 (15:38 -0800)
committerMichael Turquette <mturquette@linaro.org>
Wed, 25 Feb 2015 20:08:39 +0000 (12:08 -0800)
commit9ca62eae55def5a5e0d11c2eeb9a4ea06e75cbe7
tree807e1a1081c4bc56544cbf7dfc6fe4a3e3c6db9btree | snapshot
parent3b4be2eeb80006c93c7c35ab569cc9b4d28ad8fdcommit | diff
clk: qcom: lcc-msm8960: Fix PLL rate detection

regmap_read() returns 0 on success, not the value of the register
that is read. Fix it so we properly detect the frequency plan.

Fixes: 1a9a6f4343f3 "clk: qcom: Add MSM8960/APQ8064 LPASS clock
controller (LCC) driver"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
drivers/clk/qcom/lcc-msm8960.c diff | blob | history
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