]> git.baikalelectronics.ru Git - kernel.git/commit
RISC-V: Add DT documentation for SiFive L2 Cache Controller
authorYash Shah <yash.shah@sifive.com>
Mon, 6 May 2019 10:48:39 +0000 (16:18 +0530)
committerPalmer Dabbelt <palmer@sifive.com>
Fri, 17 May 2019 03:42:13 +0000 (20:42 -0700)
commit9bfc0e5a134d9512a9f9e764ad8fb9d33ccfcaba
treef0578abef4b66e0aaf6ffcf087df6a2a3643183b
parentf0837968c0007f51034dc22b8a1f173671f563ac
RISC-V: Add DT documentation for SiFive L2 Cache Controller

Add device tree bindings for SiFive FU540 L2 cache controller driver

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt [new file with mode: 0644]