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(parent: 4f7cbf5) | patch
clk: zynqmp: Add gem rx and tsu clocks to return register
authorAshok Reddy Soma <ashok.reddy.soma@amd.com>
Thu, 20 Jul 2023 07:28:59 +0000 (01:28 -0600)
committerMichal Simek <michal.simek@amd.com>
Fri, 21 Jul 2023 07:00:39 +0000 (09:00 +0200)
commit9aebc549e76ee874d390e6b3897b9fab6571ab54
tree7da3617379af83d0dbdba59cad01025524f6deb6tree | snapshot
parent4f7cbf58a4f2a73e0707048b1bec7e60bf83e5d4commit | diff
clk: zynqmp: Add gem rx and tsu clocks to return register

Add gem_tsu and gem0_rx till gem3_rx to return proper register from
zynqmp_clk_get_register. Otherwise firmware won't be able to set clock
for these due to incorrect register address.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230720072859.3724-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
drivers/clk/clk_zynqmp.c diff | blob | history
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