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(parent: d718e98) | patch
ALSA: hda/tegra: Align BDL entry to 4KB boundary
authorMohan Kumar <mkumard@nvidia.com>
Mon, 5 Sep 2022 17:24:20 +0000 (22:54 +0530)
committerTakashi Iwai <tiwai@suse.de>
Tue, 6 Sep 2022 05:13:32 +0000 (07:13 +0200)
commit9738c469c0980003fb8ab4b0d190c2fd8aa1765f
tree1f7a9cd10ad69088bfd80105070aa3892638bd6btree | snapshot
parentd718e9809d90339d2a2754e20d29b72a0c04cc0dcommit | diff
ALSA: hda/tegra: Align BDL entry to 4KB boundary

AZA HW may send a burst read/write request crossing 4K memory boundary.
The 4KB boundary is not guaranteed by Tegra HDA HW. Make SW change to
include the flag AZX_DCAPS_4K_BDLE_BOUNDARY to align BDLE to 4K
boundary.

Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Link: https://lore.kernel.org/r/20220905172420.3801-1-mkumard@nvidia.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
sound/pci/hda/hda_tegra.c diff | blob | history
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