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(parent: 5bbefe7) | patch
RISC-V: Disable preemption before enabling interrupts
authorAtish Patra <atish.patra@wdc.com>
Tue, 2 Oct 2018 19:14:58 +0000 (12:14 -0700)
committerPalmer Dabbelt <palmer@sifive.com>
Tue, 23 Oct 2018 00:03:36 +0000 (17:03 -0700)
commit939a42e170d69380aae3c39fa6bae59e6df3da34
treed91d87868100acbbf8436728ebcdccc152689766tree | snapshot
parent5bbefe7b775084322a328e4167438e081f6ed4b7commit | diff
RISC-V: Disable preemption before enabling interrupts

Currently, irq is enabled before preemption disabling happens.
If the scheduler fired right here and cpu is scheduled then it
may blow up.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
[Atish: Commit text and code comment formatting update]
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
arch/riscv/kernel/smpboot.c diff | blob | history
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