]> git.baikalelectronics.ru Git - kernel.git/commit
PCI: cadence: Use AXI region 0 to signal interrupts from EP
authorAlan Douglas <adouglas@cadence.com>
Thu, 11 Oct 2018 16:15:43 +0000 (17:15 +0100)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 12 Oct 2018 11:09:04 +0000 (12:09 +0100)
commit935be47f1bd55bfa30e97015934f5d37ad31710b
tree5d3abbaab28f17e1d3dd656789591386a1c67395
parenta577b660b04c89261c3fd59dc421481c1fd4b5f1
PCI: cadence: Use AXI region 0 to signal interrupts from EP

The IRQ physical address is allocated from region 0, rather than
the highest region. Update the driver to reserve this region in
the bitmap and to use region 0 for all types of interrupt.

This corrects a problem which prevents the interrupt being
signalled correctly if using the first address in the AXI region,
since an offset of zero will always be mapped to region 0.

Fixes: 904bb5a93cbe ("PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller")
Signed-off-by: Alan Douglas <adouglas@cadence.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
drivers/pci/controller/pcie-cadence-ep.c