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(parent: 32c5eb1) | patch
irqchip: nvic: Fix offset for Interrupt Priority Offsets
authorVladimir Murzin <vladimir.murzin@arm.com>
Wed, 1 Dec 2021 11:02:58 +0000 (11:02 +0000)
committerMarc Zyngier <maz@kernel.org>
Thu, 2 Dec 2021 09:27:06 +0000 (09:27 +0000)
commit8f85a65744497e17259b1376e98087d5da45aaef
tree10771c98bce693f81bef0f234050abfac1e9c6eatree | snapshot
parent32c5eb16181257a0b05137ad59c5411ae6be0e3bcommit | diff
irqchip: nvic: Fix offset for Interrupt Priority Offsets

According to ARM(v7M) ARM Interrupt Priority Offsets located at
0xE000E400-0xE000E5EC, while 0xE000E300-0xE000E33C covers read-only
Interrupt Active Bit Registers

Fixes: 8daa530e9f6c ("irqchip: Add support for ARMv7-M NVIC")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211201110259.84857-1-vladimir.murzin@arm.com
drivers/irqchip/irq-nvic.c diff | blob | history
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