]> git.baikalelectronics.ru Git - kernel.git/commit
drm/amd/display: Do DIO FIFO enable after DP video stream enable
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Wed, 7 Sep 2022 14:11:34 +0000 (10:11 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 29 Sep 2022 13:41:44 +0000 (09:41 -0400)
commit8e517eb503d51bc90e079b181cb6d063a429d3c8
tree1cbfee061336d8f4e5cabd7b5a2b77f9a876e9a9
parent74881ae853e220da0b9609b1417eeaa12958528d
drm/amd/display: Do DIO FIFO enable after DP video stream enable

[Why]
Avoids a race condition where DIO FIFO can underflow due to no incoming
data available.

[How]
Shift the FIFO enable below stream enable.

Make sure fullness level is written before the DIO reset takes place
and that we're not doing it twice.

Reviewed-by: Syed Hassan <Syed.Hassan@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_dio_stream_encoder.c