]> git.baikalelectronics.ru Git - kernel.git/commit
mtd: rawnand: qcom: Fix clock sequencing in qcom_nandc_probe()
authorBryan O'Donoghue <bryan.odonoghue@linaro.org>
Mon, 3 Jan 2022 03:03:15 +0000 (03:03 +0000)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Tue, 25 Jan 2022 09:31:44 +0000 (10:31 +0100)
commit8c98defd277407b1ae5a2d7bc3e660e6102821ae
treec6ad4f9a11aa784a040e1e14828a9be0c31f7565
parentcd9419944f00b5140f984e1e04a249f54043ec10
mtd: rawnand: qcom: Fix clock sequencing in qcom_nandc_probe()

Interacting with a NAND chip on an IPQ6018 I found that the qcomsmem NAND
partition parser was returning -EPROBE_DEFER waiting for the main smem
driver to load.

This caused the board to reset. Playing about with the probe() function
shows that the problem lies in the core clock being switched off before the
nandc_unalloc() routine has completed.

If we look at how qcom_nandc_remove() tears down allocated resources we see
the expected order is

qcom_nandc_unalloc(nandc);

clk_disable_unprepare(nandc->aon_clk);
clk_disable_unprepare(nandc->core_clk);

dma_unmap_resource(&pdev->dev, nandc->base_dma, resource_size(res),
   DMA_BIDIRECTIONAL, 0);

Tweaking probe() to both bring up and tear-down in that order removes the
reset if we end up deferring elsewhere.

Fixes: f10bba44d966 ("mtd: nand: Qualcomm NAND controller driver")
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220103030316.58301-2-bryan.odonoghue@linaro.org
drivers/mtd/nand/raw/qcom_nandc.c