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(parent: 328bb01) | patch
drm/amdgpu:Add new register offset/mask to support VCN DPG mode
authorJames Zhu <James.Zhu@amd.com>
Mon, 10 Sep 2018 18:58:16 +0000 (14:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Sep 2018 02:09:23 +0000 (21:09 -0500)
commit89d67acaac84989546bd4323e58d9514428d79dc
treefe191256abb7a9cade854159f9b7fc81728729aftree | snapshot
parent328bb011216e49ccaa4bfa8981e0e9bee014d8e5commit | diff
drm/amdgpu:Add new register offset/mask to support VCN DPG mode

New register offset/mask need to be added to support VCN DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h diff | blob | history
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h diff | blob | history
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