]> git.baikalelectronics.ru Git - kernel.git/commit
clk: Renesas versaclock7 ccf device driver
authorAlex Helms <alexander.helms.jy@renesas.com>
Mon, 12 Sep 2022 18:36:13 +0000 (11:36 -0700)
committerStephen Boyd <sboyd@kernel.org>
Sat, 1 Oct 2022 00:34:35 +0000 (17:34 -0700)
commit87bb6c97e8ff5dab175d92825c9c15ca5970fcda
treefff3052e2ae08d04e60d8e87671dcb990e4b8d3d
parent53e995c63f0f9b786c980ab7b548426c2e550fcb
clk: Renesas versaclock7 ccf device driver

Renesas Versaclock7 is a family of configurable clock generator ICs
with fractional and integer dividers. This driver has basic support
for the RC21008A device, a clock synthesizer with a crystal input and
8 outputs. The supports changing the FOD and IOD rates, and each
output can be gated.

Signed-off-by: Alex Helms <alexander.helms.jy@renesas.com>
Link: https://lore.kernel.org/r/20220912183613.22213-3-alexander.helms.jy@renesas.com
Tested-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
MAINTAINERS
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/clk-versaclock7.c [new file with mode: 0644]