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(parent: f64eb81) | patch
idle, x86: Allow off-lined CPU to enter deeper C states
authorBoris Ostrovsky <boris.ostrovsky@amd.com>
Tue, 13 Mar 2012 18:55:09 +0000 (19:55 +0100)
committerLen Brown <len.brown@intel.com>
Fri, 30 Mar 2012 07:23:01 +0000 (03:23 -0400)
commit85e43899c29988fc4e996dbf329eb99024f43611
treed3c95b68626ac7d963ac3a85a07dae1cfc011906tree | snapshot
parentf64eb816e31634b5afe396e48c737b478ff1694ccommit | diff
idle, x86: Allow off-lined CPU to enter deeper C states

Currently when a CPU is off-lined it enters either MWAIT-based idle or,
if MWAIT is not desired or supported, HLT-based idle (which places the
processor in C1 state). This patch allows processors without MWAIT
support to stay in states deeper than C1.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@amd.com>
Signed-off-by: Len Brown <len.brown@intel.com>
arch/x86/kernel/smpboot.c diff | blob | history
drivers/acpi/processor_idle.c diff | blob | history
drivers/cpuidle/cpuidle.c diff | blob | history
include/linux/cpuidle.h diff | blob | history
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