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(merge: 4e89848 69a131d)
Merge changes from topic "mb/gic600-errata" into integration
authorManish Pandey <manish.pandey2@arm.com>
Tue, 21 Jun 2022 12:11:47 +0000 (14:11 +0200)
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>
Tue, 21 Jun 2022 12:11:47 +0000 (14:11 +0200)
commit84adb0519e96251bbd7b4a5dabe904b4a7f3a833
treebf7253b8a5fc075ca633d06867f3fa2c7b346563tree | snapshot
parent4e898483de5fc56dc271179d55dbaec69d7aad4ccommit | diff
parent69a131d894dde9a6570877c7bf181fb60484342dcommit | diff
Merge changes from topic "mb/gic600-errata" into integration

* changes:
  refactor(arm): update BL2 base address
  refactor(nxp): use DPG0 mask from Arm GICv3 header
  fix(gic600): implement workaround to forward highest priority interrupt
docs/design/cpu-specific-build-macros.rst diff1 | diff2 | blob | history
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