]> git.baikalelectronics.ru Git - kernel.git/commit
projects / kernel.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 622956c) | patch
ASoC: rockchip: i2s: Fixup clk div error
authorSugar Zhang <sugar.zhang@rock-chips.com>
Thu, 26 Aug 2021 04:01:48 +0000 (12:01 +0800)
committerMark Brown <broonie@kernel.org>
Thu, 26 Aug 2021 12:59:31 +0000 (13:59 +0100)
commit8406ecbeae00e0a5b76327263bee566b54f5e0fd
treee456bf342072a723076a8b77880a3c2281fbd217tree | snapshot
parent622956c580b17e8efc16350cc3a0356003c63287commit | diff
ASoC: rockchip: i2s: Fixup clk div error

MCLK maybe not precise as required because of PLL,
but which still can be used and no side effect. so,
using DIV_ROUND_CLOSEST instead div.

e.g.

set mclk to 11289600 Hz, but get 11289598 Hz.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950520-14190-2-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/rockchip/rockchip_i2s.c diff | blob | history
Linux Kernel Source Tree.