]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Add PIPECONF YCbCr 4:4:4 programming for HSW
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 18 Jul 2019 14:50:50 +0000 (17:50 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 20 Sep 2019 18:46:22 +0000 (21:46 +0300)
commit80cfc9e61d736308993254b698c6da2e3b508bc5
tree050d0076dcbdbc2923904f18d922b506889a0953
parente1ccae3b85bf7b01371d591a66403a8b68d72d82
drm/i915: Add PIPECONF YCbCr 4:4:4 programming for HSW

On HSW the pipe colorspace is configured via PIPECONF
(as opposed to PIPEMISC in BDW+). Let's configure+readout
that stuff correctly.

Enabling YCbCr 4:4:4 output will now be a simple matter of
setting crtc_state->output_format appropriately in the encoder
.compute_config().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190718145053.25808-10-ville.syrjala@linux.intel.com
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/i915_reg.h